Photolithographic masks are used during the fabrication of integrated circuits. Masks are used, for example, to define the shapes and sizes of gates, sources, drains, and other structures associated with the transistors on an integrated circuit. In some process steps, layers of material are deposited. In other process steps, masks are used to define etch patterns that selectively remove parts of deposited layers. Ion implantation steps are used to dope semiconductor regions.
To ensure that integrated circuits can be fabricated economically, care must be taken to avoid the use of an excessive number of masks and process steps. At the same time, designs should be optimized to implement suitable tradeoffs. For example, transistors should exhibit desired strengths, without becoming so strong that they exhibit excessive leakage currents.
In designing economical circuits that exhibit a satisfactory balance between various design criteria, it is often difficult to maintain low mask counts. For example, it might be possible to lower overall power consumption on an integrated circuit by reducing transistors strength globally while increasing transistor strength in only a localized area on an integrated circuit. A localized transistor strength increase might be implemented, for example, using localized transistor size changes, localized implants, or localized gate insulator thicknesses. While this type of approach may be satisfactory for optimizing circuit performance, the additional masks and process steps that are generally required may be overly costly, complex, and time consuming.